1. Field of the Invention
The present invention relates to a thin film transistor substrate applied for a display device and, more particularly, to a thin film transistor substrate capable of minimizing flickers or residual images in displaying images by a display device by stably applying a uniform common voltage to an entire surface of a thin film transistor substrate.
2. Description of the Related Art
Recently, flat panel display devices such as a liquid crystal display (LCD), a PDP (Plasma Display Panel), an OLED (Organic Light Emitting Device), an electrophoretic indication display), or the like, have been developed in place of a conventional CRT.
Among the flat panel display devices, the LCD is commonly used thanks to its advantages that it is thinner and lighter and consumes relatively less power compared with the CRT.
In general, the LCD is a device in which an arrangement state of liquid crystals is controlled by varying a generated field by a potential between two electrodes (pixel electrode and common electrode), and light transmittance is controlled according to the arrangement state of liquid crystals to thus display images. The LCD includes a liquid crystal panel that includes a color filter substrate having color filters, a thin film transistor (TFT) substrate having TFTs, and a liquid crystal layer positioned between the color filter substrate and the TFT substrate.
Here, the TFT substrate 1 includes a display area (a) for displaying an image and a non-display area (b) that does not display an image. The display area (a) includes a plurality of display pixels P1 formed in a matrix form to display an image, and the non-display area (b) includes dummy pixels P2 for maintaining a certain cell gap when the color filter substrate and the TFT substrate 1 are attached. Unlike the display pixels P1 positioned at the display area (a), the dummy pixels P2 do not have the TFT, not displaying an image, but have the same structure as that of the display pixels P1.
Here, as shown in FIG. 1, the TFT 1 includes gate wiring 2 and data wiring 3 formed to cross each other. The gate wiring 2 includes a gate line 2a extending generally in a horizontal direction, a gate pad (not shown) formed at an end portion of the gate line 2a, and a gate electrode 2b constituting the TFT as a portion of the gate line 2a. The gate electrode 2b may be formed with a larger width than the gate line 2a. The data wiring 3 includes a data line 3a extending generally in a vertical direction and a data pad 3b formed at an end of the data line 3a. A region where the gate line 2a and the data line 3a cross is defined as a pixel. For example, as shown in FIG. 1, a pixel having an IPS (in-Plane Switching) structure includes a pixel electrode 4 and a common electrode 5 that are alternately formed repeatedly. A common voltage line 6 is provided along edges of the pixel to apply a common voltage Vcom to the common electrode 5. The common voltage line 6 is mutually connected in an extending direction of the gate line 2a. 
However, the common voltage Vcom applied to the common voltage line 6 is lowered (voltage drop) due to self-resistance of the common voltage line 6, causing a problem that the common voltage is not uniformly applied to the entire surface of the TFT substrate 1. The non-uniformity of the common voltage degrades picture quality such as residual images or flickers.